EDN

Reducing EMI in digital systems using spread spectrum clock generators (Part 1 of 2)

Over the past couple of decades, more and more applications are going digital. Implementation of digital systems is very simple as it is entirely about logic; however, complexity increases ...
Electronic Design

How Best to Measure SSC on Data

Spread spectrum clocking (SSC) is used in many computer interfaces such as PCI Express and Serial ATA to improve the EMI performance of the interface. It takes the form of frequency modulation (FM) of ...
EDN

Spread-spectrum clocking: measuring accuracy and depth

Many of today's high-speed serial designs use embedded clocks to avoid routing and timing issues involved with separate data and clock signals and to free up precious real estate on board designs.
Design-Reuse

Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR

It is common for an ADC or DAC to be required to meet a SFDR (spurious free dynamic range) specification. Definition: “Spurious-free dynamic range (SFDR) is the strength ratio of the fundamental ...
Electronic Design

Nonstandard Time Zones

EMC-aware designs eliminate objectionable interference at the source. Clock signals figure prominently in microprocessor-controlled systems. Regardless of their architecture, digital processing ...