Design-Reuse

Key ASIC and Silterra Partner to Deliver Design-to-Manufacture Services Targeted for Mobile and Consumer Electronics Markets

SANTA CLARA, Calif. & KULIM, Malaysia--May 23, 2006-- Key ASIC, a leading fabless provider of ASIC and System-on-Chip (SoC) design-to-manufacture services for portable and consumer applications, and ...
Electronic Design

RF CMOS ASIC Platforms Simplify Implementation Of Advanced RF SoCs

Toshiba Electronics Europe’s ASIC Foundry Business Unit has announced a new generation of technologies and services for speeding the development and reducing the cost of system-on-a-chip (SoC) RF ICs ...
EDN

Toshiba combines CMOS ASIC and eDRAM technologies to support rapid development of SIDSA mobile TV chipset

BRUSSELS — Toshiba Electronics Europe (TEE) has announced that the company's renowned CMOS ASIC process and Embedded DRAM (eDRAM) technology have played a key role in the development of a next ...
Design-Reuse

Avago Advances Its ASIC Technology to the Next Generation: Proves High-Performance 12.5 Gbps SerDes Core in 65 Nm CMOS Process

SAN JOSE, Calif., Wireless System Design Conference and Expo 2002, June 26, 2006 -- Avago Technologies, the world's largest privately held semiconductor company, today announced it is among the first ...
Electronic Design

Select The Optimum ASIC ApproachSponsored by: FREESCALE SEMICONDUCTOR

Requirements of high speed for data networs and high frequency for broadband systems make the selection of the best ASIC approach critical for both performance and cost. When pushing the performance ...
Elektronik Net

ASIC design with direct access to TSMC

GUC is an ASIC design house for complex SoC and chiplets. Alex Huang, General Manager GUC Europe, Norbert Siedhoff, Representative of GUC, and Bastian Strassburg, Director Line Management & Marketing ...
Electronics Weekly

NEC structured Asic is two million gates

NEC Electronics is offering up to two million usable gates in structured Asics fabricated on the firm’s 0.15µm CMOS process. Called the 12M series, it also offers 2.6Mbit of embedded memory and a ...
Ars Technica

ASIC design/verification or embedded systems programming

1. In a big company, doing ASIC design verification for a WCDMA modem for 3G cellular chips. 2. Small company, doing Embedded Software Programming. Working on the design and implementation of layer 1 ...
Ars Technica

Breaking into ASIC Design/Verification

I'm fast approaching the one year mark with my current employer since I graduated last year. Previously, I did three four month work terms with them and they were for the most part interesting. I took ...
EDN

Fujitsu rolls design kit for RF CMOS

SAN JOSE, Calif. — Seeking to propel new designs and product cycle times, Fujitsu Ltd.'s chip unit has introduced a new process design kit (PDK) for its 90- and 65-nm radio-frequency (RF) CMOS ...