Morningstar

SiFive’s New RISC-V IP Combines Scalar, Vector and Matrix Compute to Accelerate AI from the Far Edge IoT to the Data Center

SiFive’s New RISC-V IP Combines Scalar, Vector and Matrix Compute to Accelerate AI from the Far Edge IoT to the Data Center New X100 Series Joins Upgraded X200, X300 and XM IP to Address Growing ...
EDN

SiFive enhances RISC-V IP with new features and upgrades

SiFive, Inc. has unveiled its Second Generation Intelligence family of RISC-V IP with the launch of five new RISC-V-based products, targeting a range of applications from the far edge IoT to the data ...
EDN

RISC-V IP expands AI capabilities at the edge

SiFive’s Intelligence Gen 2 RISC-V IP portfolio combines scalar, vector, and matrix compute to accelerate AI workloads. The Gen 2 lineup includes the new X160 and X180, alongside the upgraded X280, ...
VentureBeat

Beyond Von Neumann: Toward a unified deterministic architecture

A cycle-accurate alternative to speculation — unifying scalar, vector and matrix compute In dynamic execution, processors speculate about future instructions, dispatch work out of order and roll back ...