The JK flip-flop augments the behavior of the SR flip-flop (J = Set, K = Reset) by interpreting the J = K = 1 condition as a “flip” or toggle command. In my previous column, we introduced latches and ...
In this column, we take a closer look as to how timing and delays affect our logic circuits. As part of this, we start to consider the timing diagrams presented in data sheets. As I was writing my ...
This is an oldie, but oh, man is this ever good. It’s a Nixie clock made without a microcontroller. In fact, there aren’t any logic chips in this circuit, either. As far as we can tell, the logic in ...