Semiconductor Engineering

Successful 3D-IC Design, Verification, And Analysis Requires An Integrated Approach

3D-IC designs enable improvements in performance, power, footprint, and costs that cannot be attained in system-on-chip (SoC) and IC design. However, the leap from traditional SoC/IC design to 3D-IC ...
Semiconductor Engineering

Earlier SoC Design Exploration And Verification Gets Better Designs To Tapeout Faster

Between the complexity of advanced node design verification and the competition to be first to the market, system-on-chip (SoC) designers no longer have the luxury of waiting until each sub-block of a ...
Design-Reuse

Using in-design physical verification to reduce tapeout schedules

. Tadahiko Yamamoto is Chief Specialist, Design Methodology Development Group, at Toshiba Corp. . Norikazu Ooishi is Specialist, Design Methodology Group, at Toshiba Corp. Physical designers moving to ...
EDN

IC verification tool addresses design complexity, productivity gap

A new software combines connectivity, scalability and data-driven artificial intelligence (AI) capabilities to push the boundaries of the IC verification process and make chip design teams more ...
EDN

Hardware tools aid engineers in design verification

You can use accelerators for front-end simulation and emulators for back-end verification. Products that perform both functions ease the burden for designers. Prototyping can be an efficient ...
Business Wire

Mentor Graphics Provides Design, Verification, Thermal and Test Solutions for TSMC’s CoWoS™ Reference Flow

WILSONVILLE, Ore.--(BUSINESS WIRE)--Mentor Graphics Corp. (NASDAQ: MENT) today announced IC physical design, verification, thermal analysis and test design tools that have been selected for TSMC’s new ...
Design-Reuse

Advanced Techniques for IP Design and Verification

As designs grow in size and complexity, the challenges associated with low power and the growing design and verification gap have created the need for a paradigm shift in the IP design and ...
Embedded

Dealing with SoC hardware/software design complexity with scalable verification methods

The problem with today's existing methodologies is that verification issubservient to design. This principle requires a shift in paradigm,especially in designing complex electronic systems. Why?
Electronic Design

The New “Shift-Left” Multi-Dimensional PCB Design-Verification Platform

Editor Bill Wong talks with Mentor’s David Wiens about its unique “shift-left” PCB design verification platform for early prototyping and reduced re-spins. A “shift-left” PCB design verification ...
MD&M East

Design Verification vs. Design Validation: Right Questions or Right Answers?

When it comes to verification and validation, medical device companies need to ensure that what they're doing actually makes sense. Known colloquially as "V&V," for many it feels like you're on the ...
Electronic Design

11 Myths About Verification IP

It’s time to put to rest 11 of the most common myths about verification intellectual property (VIP). SmartDV’s Bipul Talukdar, Director of Applications Engineering, explains why it’s used in a ...